Geb enterprise presents FPGA PCIe Boards for Electromedical Applications

Linux and Windows drivers make immediately possible the access to FPGA resources writing the application at user level.

System Development Kits and its sources files (VHDL & QSYS) has been provided to the easiest accessibility tailoring the FPGA board on your application

The Demo programs, guide you to start any design in a couple of minutes

The PCIe board family, promptly customizable whether in the hardware interfaces and/or in the Fpga contents, makes the connection possible between your equipment and a PCIe host slot.

The PCIE on Cable, also called PCI Express External Cabling, extends the PCI Express bus up to some meters from the host CPU, with high performances and measurable simplification of software development and equipment wiring.

The pre-compiled FPGA Systems offer you an admirable advantage to use the PCIe I/O, starting from a simple parallel I/O, programmable speed bus interface, up to high speed DMA data transfer in both directions.

Three format factor boards following the PCIe standard (developed by the PCI-SIG organization) are available. The following cards have all-in-one, whatever is needed to start using the Altera CycloneIV-GX FPGA on standard PC. Each board provides 53 I/O''s and 3 programmable clocks.

-Standard PC Fpga Board. Typical application is where the use of a standard PC and/or digital and analog I/O, at low or high speed, are required. The I/O are available through both IDC and High density connectors. An on board Santa Cruz (an Altera Standard) slot allows usage of Altera I/O interfaces or custom interface.

-PCIe Mini Card (also called Mini PCIe). has a small form factor, the card size is 30x51x5mm. Typical applications are in all types of remote I/O controller with Industrial Motherboard SBC (Mini-Itx, 3.5”SBC…). The I/O are available through IDC High density connectors.

-PCI Express Cable cards. This standard transmits the host PCI Express bus over a high-speed cable far from the host CPU. This can be done in a box-to-box type application, splitting the host PCIe environment by the remote embedded I/O subsystems.